|
DR1M90MEG484
|
Ë«ºË ARM ´¦ÀíÆ÷ |
NEON & Single / Double Precision Floating Point for each processor |
1000 |
L1:32 KB Instruction,32 KB data per processor ; L2:512 KB |
256KB |
16/32-bit DDR3/DDR3L/DDR4 |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet£¬SD4.2/SDIO/eMMC5.1 ¿ØÖÆÆ÷ |
AXI 32-bit Master£¬AXI 32-bit Slave£¬AXI 64-bit/32-bit Memory(HP)£¬AXI 64-bit ACP£¬16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
ARM ͨÓö¨Ê±Æ÷£¬ ϵͳ¼¶ Triple-timer ¼ÆÊýÆ÷, ¿´ÃŹ·¶¨Ê±Æ÷ |
54 |
Quad-SPI£¬NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
2 |
1 |
2 |
195 |
|
DR1M90GEG484
|
Ë«ºË ARM ´¦ÀíÆ÷ |
NEON & Single / Double Precision Floating Point for each processor |
1000 |
L1:32 KB Instruction,32 KB data per processor ; L2:512 KB |
256KB |
16/32-bit DDR3/DDR3L/DDR4 |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet£¬SD4.2/SDIO/eMMC5.1 ¿ØÖÆÆ÷ |
AXI 32-bit Master£¬AXI 32-bit Slave£¬AXI 64-bit/32-bit Memory(HP)£¬AXI 64-bit ACP£¬16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
ARM ͨÓö¨Ê±Æ÷£¬ ϵͳ¼¶ Triple-timer ¼ÆÊýÆ÷, ¿´ÃŹ·¶¨Ê±Æ÷ |
54 |
Quad-SPI£¬NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
2 |
1 |
- |
201 |
|
DR1V90MEG484
|
µ¥ºË RISC-V ´¦ÀíÆ÷ |
P/F/D Instruction Extension |
800 |
L1:32 KB Instruction,32 KB data per processor ITCM£º256KB DTCM1£º256KB |
256KB |
16/32-bit DDR3/DDR3L/DDR4 |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet£¬SD4.2/SDIO/eMMC5.1 ¿ØÖÆÆ÷ |
AXI 32-bit Master£¬AXI 32-bit Slave£¬AXI 64-bit/32-bit Memory(HP)£¬32-bit AHB£¬16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
RISC-V ¶¨Ê±Æ÷£¬ÏµÍ³¼¶ Triple-timer ¼ÆÊýÆ÷£¬¿´ÃŹ·¶¨Ê±Æ÷ |
54 |
Quad-SPI£¬NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
2 |
1 |
2 |
195 |
|
DR1V90GEG484
|
µ¥ºË RISC-V ´¦ÀíÆ÷ |
P/F/D Instruction Extension |
800 |
L1:32 KB Instruction,32 KB data per processor ITCM£º256KB DTCM1£º256KB |
256KB |
16/32-bit DDR3/DDR3L/DDR4 |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet£¬SD4.2/SDIO/eMMC5.1 ¿ØÖÆÆ÷ |
AXI 32-bit Master£¬AXI 32-bit Slave£¬AXI 64-bit/32-bit Memory(HP)£¬32-bit AHB£¬16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
RISC-V ¶¨Ê±Æ÷£¬ÏµÍ³¼¶ Triple-timer ¼ÆÊýÆ÷£¬¿´ÃŹ·¶¨Ê±Æ÷ |
54 |
Quad-SPI£¬NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
2 |
1 |
- |
201 |
|
DR1V90GEG400
|
µ¥ºË RISC-V ´¦ÀíÆ÷ |
P/F/D Instruction Extension |
800 |
L1:32 KB Instruction,32 KB data per processor ITCM£º256KB DTCM1£º256KB |
256KB |
16/32-bit DDR3/DDR3L/DDR4 |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet£¬SD4.2/SDIO/eMMC5.1 ¿ØÖÆÆ÷ |
AXI 32-bit Master£¬AXI 32-bit Slave£¬AXI 64-bit/32-bit Memory(HP)£¬32-bit AHB£¬16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
RISC-V ¶¨Ê±Æ÷£¬ÏµÍ³¼¶ Triple-timer ¼ÆÊýÆ÷£¬¿´ÃŹ·¶¨Ê±Æ÷ |
54 |
Quad-SPI£¬NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
2 |
1 |
- |
126 |
|
DR1M90GEG400
|
Ë«ºË ARM ´¦ÀíÆ÷ |
NEON & Single / Double Precision Floating Point for each processor |
1000 |
L1:32 KB Instruction,32 KB data per processor ; L2:512 KB |
256KB |
16/32-bit DDR3/DDR3L/DDR4 |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet£¬SD4.2/SDIO/eMMC5.1 ¿ØÖÆÆ÷ |
AXI 32-bit Master£¬AXI 32-bit Slave£¬AXI 64-bit/32-bit Memory(HP)£¬AXI 64-bit ACP£¬16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
ARM ͨÓö¨Ê±Æ÷£¬ ϵͳ¼¶ Triple-timer ¼ÆÊýÆ÷, ¿´ÃŹ·¶¨Ê±Æ÷ |
54 |
Quad-SPI£¬NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
2 |
1 |
- |
126 |